The present invention relates to a semiconductor device and a method of fabricating the same. More particularly, the present invention relates to techniques effectively applicable to a lead-on-chip (LOC) semiconductor device.
The LOC package is one of surface-mount LSI packages. In the LOC package, inner lead parts of leads are arranged on an insulating film formed on a major surface of a semiconductor chip, and the inner lead parts are connected electrically to the bonding pads of the semiconductor chip with Au wires. The insulating film is formed of a heat-resistant resin, such as a polyimide resin. The opposite surfaces are coated with an adhesive.
A LOC package of this kind is disclosed in Japanese Patent Laid-Open No. Hei 2-246125.